Framework
The framework is based on
UNISIM which can be downloaded
here. First install UNISIM.
Then compile the cycle-level simulator dse-hier:
| cd components/CycleLevel/simulators/dse-hier |
| make |
To test the environment, you can now run the hello binary:
| ./dse ../benchmarks/powerpc/hello |
For more options:
Getting started
The main file is dse.uni.cxx
specifying all the module connections.
The important lines here are:
| #define CACHE_HIERARCHY_LEVEL 1 |
specifying the number of cache levels
to include the selected modules, e.g. a non-blocking write back
cache, and finally to instantiate the parametrized module as MyL1Cache.
| typedef CacheWBNB<Instruction, |
| __CacheWBNB_nCPUtoCacheDataPathSize,__CacheWBNB_nCachetoCPUDataPathSize, |
| __CacheWBNB_nMemtoCacheDataPathSize,__CacheWBNB_nCachetoMemDataPathSize, |
| __CacheWBNB_nLineSize,__CacheWBNB_nCacheLines,__CacheWBNB_nAssociativity, |
| __CacheWBNB_nStages,__CacheWBNB_nDelay,__CacheWBNB_nProg, |
| __CacheWBNB_nMSHR,__CacheWBNB_nMSHRRead,0>MyL1Cache;
|
Parameter settings
The actual parameter settings can be found in CacheWBNB.default.h.
To change the default parameter settings, simply define the appropriate constant in CacheWBNB.next.h.
For example, if you want to change the number of cache lines put this line in CacheWBNB.next.h:
| #define __CacheWBNB_nCacheLines 512 |
Whenever you want to evaluate another configuration you need to recompile (type 'make') before running.
Several (combinations of) parameter settings describe no-sense architectural design points. If this is the case,
you will get a runtime error, e.g. if you specify in CacheWBNB.default.h:
| #define __CacheWBNB_nCacheLines 321 |
you will get
| Error: nCacheLines needs to be a power-of-2 within the range [128;1048576] |
| Error: Some module parameters are not valid. |
The specification of valid designs is controlled by the function 'check_parameters()' in
CacheWBNB.sim
Cache Class
CacheWBNB.sim defines the class CacheWBNB. As it is a wrapped Mircolib cache it goes together with a the corresponding CacheWBNB.h. In both of these files you will find the core of the cache mechanism, i.e. the signals to communicate with the other modules. The cache structure itself can be found in CacheContainer.h in public/components/CycleLevel/packages/system/CacheContainer.h.
Standardized Interfaces
In order to plug-and-play with various caches your cache has to satisfy the interface as illustrated below.
